Over the years, various integrated circuit chips have been developed and used to build constant current, constant voltage flyback power supplies for many power supply applications, including off-line AC/DC power supply adapters, chargers, and standby power supplies for portable electronic equipment.
FIG. 1 (prior art) illustrates an exemplary prior art constant output current flyback converter 10 controlled on the secondary side of a transformer 11. Transformer 11 has three windings: a primary-side winding Lp, a secondary-side winding Ls, and an auxiliary winding La. Converter 10 has a primary switch 12, which is an external metal-oxide semiconductor field-effect transistor (MOSFET). Flyback converter 10 also has a secondary side resistor 13 that represents the resistive loss of the copper windings of transformer 11, a first current sense resistor 14, a secondary rectifier 15, an output capacitor 16, an optical coupler 17, a second current sense resistor 18, a bias resistor 19, a current limit transistor 20, and a conventional peak-current-mode pulse width modulation (PWM) control integrated circuit (IC) 21. The initial start-up energy for control IC 21 is provided by a resistor 22 and a capacitor 23. Once flyback converter 10 is stable, auxiliary winding La of transformer 11 powers IC 21 via a rectifier 24. Second current sense resistor 18 and transistor 20 control the output current. Transistor 20 regulates the voltage across second current sense resistor 18 to a preset base-emitter voltage (VBE). The output current of flyback converter 10 is, therefore, equal to VBE divided by the resistance of second current sense resistor 18. One disadvantage of flyback converter 10 is that both the base-emitter voltage and the output current vary with temperature. Moreover, the base-emitter voltage causes significant power loss. In addition, flyback converter 10 is costly because the safety-approved optical coupler 17 adds a significant cost to the overall material cost.
FIG. 2A (prior art) illustrates a second exemplary prior art constant output current flyback converter 25 controlled on the primary side of transformer 11. Flyback converter 25 does not include the optical coupler integrated circuit of flyback converter 10, nor the current sense components on the secondary side of the transformer. Flyback converter 25, however, suffers from output current inaccuracy because (a) the primary inductor of the transformer varies, and (b) the actual peak current of the primary inductor Lp differs slightly from that indicated by the current sense voltage Vcs divided by the resistance of resistor 14. Variations in the primary inductor of transformer 11 cause the output current of flyback converter 25 to vary with the primary inductance. The actual peak current of the primary inductor Lp differs slightly from that set by the sense resistor voltage Vcs divided by the resistance of resistor 14 due to propagation delay of a current sense comparator in control IC 21, as well as the delay associated with the turning off of external MOSFET 12.
FIG. 2B (prior art) illustrates peak current detection errors in flyback converter 25 of FIG. 2A. The on/off gate drive voltage of main switch 12 in FIG. 2A is illustrated by the waveform GATE. At time T1, GATE goes high, and MOSFET 12 turns on. The primary inductor current ILP ramps up linearly at the rate dI/dt=Vp/Lp, where Vp is the voltage across the primary inductor, and Lp is the inductance of the primary inductor. Thus, the sense resistor voltage Vcs will also ramp up proportionally. The sensed voltage signal Vcs reaches Vref at T2, at which time it is assumed that the peak primary current Ip is Vref/Rcs, where Rcs is the resistance of current sense resistor 14. However, due to the propagation delay of the current limit comparator and the delays in pulse width modulation (PWM) logic and drivers in control IC 21, GATE does not go low and turn off until T3. The period (T3−T2) is the GATE turn-off delay. The drain of MOSFET 12 will fly up when the switch turns off at T3, but the primary inductor current ILP will continue to rise until the drain voltage of MOSFET 12 reaches VIN at time T4 and the polarity of the voltage across the primary inductor Lp reverses. As a result, the final primary inductor peak current is Ipf instead of Ip. Unfortunately, the final primary inductor peak current Ipf varies because (T3−T2) and (T4−T3) vary with temperature, input line voltage, IC process variations, external component tolerances, and printed circuit board (PCB) layout variations. All of these variations produce errors that detract from the accuracy of the regulation of the overall output current by flyback converter 25.
In view of the foregoing, a method is sought for regulating the output current of a flyback converter that both employs primary side control and that is relatively low cost. The method should overcome the limitations of the prior art described above by using a minimal number of integrated circuits and external components. The method should eliminate the need for a secondary circuit and an optical coupler. Moreover, the output current of the flyback converter should be largely insensitive to temperature, input line voltage, IC process variation, external component value tolerances, and PCB layout variations.